Qibec CPU: logic gates out of discrete transistors
This video shows how logic gates (inverter, NOR, NAND) are formed out of discrete transistors within the Qibec CPU, using RTL (Resistor Transistor Logic).
First, a simple introduction shows how transistors are used within the CPU (in saturated/cutoff region), using an inverter as example-circuit. Values for pull-up and base-resistors are calculated, given the design-constraints of the CPU. Then, NOR- and NAND-gates are introduced as variations on the inverter. Finally, behaviour of inverter, NOR and NAND-gates is shown on a breadboard.
For more info, visit http://Qibec.org